1. Field of the Invention
The present invention relates to the structure of a charge coupled device (CCD).
2. Description of the Related Art
The semiconductor device called “charge coupled device (CCD)” is known which has a function that in an array of a number of potential wells formed in a semiconductor, charges accumulated in the potential wells are sequentially transferred from each potential well to the adjacent one.
By using this device, for example, it is possible to form a spatial charge distribution corresponding to a spatial distribution (one-dimensional) of incident light intensity by an array-like photoelectric conversion elements, and then convert it into an output time-series signal (i.e., an electrical signal that varies over time) by repeating charge transfer in a CCD shift register.
The CCD can be used for an image sensor, a delay line, a filter, a memory, an operation unit, etc.
FIG. 1 shows a basic structure of a CCD. In FIG. 1, reference numeral 8 denotes a p-type single crystal silicon substrate. An insulating film 7 such as a silicon oxide film is formed on the surface of the p-type single crystal silicon substrate 8. Electrodes 1-6 are disposed on the insulating film 7 at predetermined intervals, whereby a number of MOS capacitors are arranged. The interval of the electrodes 1-6 is determined so as to satisfy a requirement that the adjacent MOS capacitors be charge-coupled.
Three-phase lines Ø1-Ø3 are connected to the electrodes 1-6. In the state shown in FIG. 1, a predetermined voltage is applied from the line Ø1 to the electrodes 1 and 4, whereby potential wells 9 and 10 are formed at the corresponding MOS capacitor portions. In this state, a certain amount of charge is accumulated in each of potential wells 9 and 10.
If the voltage application line is changed from the line Ø1 to the line Ø2, the potential wells that existed under the electrodes 1 and 4 disappear and potential wells are newly formed under the electrodes 2 and 5. At this time, the charges that were accumulated in the potential wells under the electrodes 1 and 4 move to the potential wells under the electrodes 2 and 5. In this manner, charges are transferred from each potential well to the adjacent one.
By properly controlling signal voltages applied to the lines Ø1-Ø3, the charge transfer is effected sequentially according to the above principle and an electrical signal is finally output to the outside of the CCD. A resulting output reflects a one-dimensional spatial distribution of charges accumulated in the MOS capacitor array.
The CCD as shown in FIG. 1 is manufactured by using a single crystal silicon wafer. As is well known, the single crystal silicon wafer is limited in shape and size.
Further, in the structure using a silicon wafer, the operation speed is limited due to occurrence of capacitance via the substrate. Although the SOI structure is known as a structure for improving this problem, it has other problems of a high cost and a difficulty in providing a large-area device.
In recent years, it is desired that devices and circuits each having a single function, such as a CCD, memory, and an amplifier, be integrated in one chip. This is necessary to satisfy increasingly strong requirements such as miniaturization, reduction in power supply voltage, reduction in power consumption, multi-functionalization, and reduction in cost.
However, if it is intended to use a conventional IC process to integrate the above-mentioned devices and circuits having different functions in one chip, there remain the above-mentioned problems of the limited substrate area and the existence of capacitance via the substrate.